ProgrammerSought

Allwinner's A10s is a high-cost tablet application solution that combines an ARM CortexTM-A8 CPU with Mali400 GPU architecture and benefits from AllWinner's cutting-edge video program. processing technology, it is also the only tablet solution on the market that can process FHD full-format video.

CPU

 ARM Cortex-A8 Core

 32KB I-Cache and 32KB D-Cache

 256KB L2 Cache

 NEON SIMD Coprocessor

 Jazelle RCT Acceleration

GPU

3D Graphic Engine

 Support Open GL ES 1.1/ 2.0 and open VG 1.1

A10S block diagram

A10S pin definition

A10S packaging size

pin map

The pinout diagram below shows the top view of the pinout for the 336-pin tfbga package.

A10s pin description

Pin Characteristics

1. Ball #: The ball number on the bottom is associated with each signal on the bottom.

2. Pin Name: Signal name multiplexed on each ball (also note that the name of the pin is the signal name in function 0)

3. Function: Multiplexing function number

Function 0 is the default function, but not necessarily the main mode.

Functions 1 to 7 are possible patterns of alternate functions.

4. Type: Signal Direction

- I = Input

- O = Output

- I/O = Input/Output

- A = Analog

- AIO = Analog Input/Output

- PWR = Power

- GND = Ground

5. Pin reset state: Terminal state in reset state (power up).

- 0: Buffer driver volume (pull down/pull up resistors not active)

- 0 (PD): The buffer drives volc with an active pull-down resistor.

- 1: Buffer drive VOH (pull/pull resistor not active)

- 1 (PU): The buffer drives vOH with an active pull-out resistor.

- Z: high impedance

- L: high impedance with active pull-down resistor

- H: High impedance active pull-up resistor.

6. Up/Down: Indicates the presence of an internal pull-up or pull-down resistor. The unplug resistor can be enabled or disabled by software.

7. Buffer Strength: The drive strength of the associated output buffer