HiSilicon Hi3798MV310 STB Chip Datasheet-Basic Information

Hi3798M V310 is an ultra-high-definition high-performance SOC chip that supports 4KP60 decoding for the IPTV/OTT set-top box market. Integrated 4-core 64-bit high-performance Cortex A53 processor and multi-core high-performance 2D/3D acceleration engine; supports H.265/AVS2 4Kx2K@P60 10bit UHD video decoding, high-performance H.265 HD video encoding, HDR video decoding and Display, HDR to SDR, BT.2020, Dolby and DTS audio processing; built-in USB2.0 and other rich peripheral interfaces. It can support customers to implement ultra-high-definition service deployment, maintain the best user experience in the industry in terms of image quality, stream compatibility, video playback smoothness, and overall performance, while meeting the ever-increasing video communication, karaoke, cloud gaming, Multi-screen interaction and other value-added business needs.

Application block diagram of Hi3798M V310:


Hi3798M V310 integrates quad-core ARM Cortex A53 as the main control CPU (Central Processing Unit) to complete system tasks and some audio and video processing functions.

 Integrate NEON

 Support DVFS, AVS dynamic power consumption reduction function

3D engine

Hi3798M V310 integrates high-performance quad-core Mali GPU to complete 3D graphics and video processing functions.

 Support OpenGL ES 2.0/1.1/1.0

 Support OpenVG 1.1

 Can meet the typical UI processing capacity of 1080P30

 Can meet 1080P30 typical game applications

Safe handling

The Hi3798M V310 provides advanced security features that provide the following security processing features:

 支持 TEE (Trusted Execution Environment)

 Support SVP (Secure Video Path)

 Support secure boot

 Support for secure storage

 Support security upgrade

 Support JTAG and other debug port protection

 Support OTP

 Support ChinaDRM (Digital Rights Management)

memory interface

Hi3798M V310 provides DDRC controller, NAND Flash controller, SDIO/MMC controller interface.

DDRC controller

DDRC (DDR3/3L/DDR4/LPDDR3 SDRAM Controller) supports dynamic memory DDR3/3L

Access control for DDR4/LPDDR3 SDRAM.

 Maximum support 2GB capacity

 The memory bit width supports 32bit

 The highest frequency can reach 1066MHz

 Support standby Power Down low power consumption function

Flash controller

FMC (Flash Memory Controller) provides a memory controller interface to connect off-chip synchronous and asynchronous NAND Flash to complete data access.

Supports various specifications of NAND Flash devices:

  − Support 2K, 4K, 8K, 16K Page-size devices.

  − Devices that support 64, 128, 256, 512 Pages/Block.

  − Devices that support 8bit data interface width.

  − Supports DDR interface and asynchronous interface devices; supports Toggle 1.0/2.0, ONFI 2.3 and ONFI3.0 devices

Support ECC function Support 8bit/1KB, 16bit/1KB, 24bit/1KB, 28bit/1KB, 40bit/1KB, 64bit/1KB BCH code ECC checksum error correction (1KB refers to the order of 1KB, not 1024Byte in the strict sense) .

  − Supports enabling and disabling of ECC check code generation, and enabling and disabling of the ECC function.

Randomizer function is supported. It is only valid in non-ECC0 mode of 8K Page-size and 16K Page-size, and it is disabled internally by the controller in other modes.

MMC/SD/SDIO Controller

Hi3798M V310 integrates 3 high-speed, high-capacity SDIO 3.0/MMC5.0 controllers to provide read and write control to MMC/SD cards.

Two of them support 1/4bit mode; the other one supports 1/4/8bit mode for eMMC startup.

data stream interface

The data stream interface of Hi3798M V310 includes Ethernet interface.

Ethernet interface

Hi3798M V310 provides 1 Ethernet controller (hereinafter referred to as ETH) and integrates 1 10/100Mbits/s PHY.

 Support one 10/100Mbits/s PHY interface

 Support working in 10Mbit/s or 100Mbit/s mode, support full-duplex or half-duplex working mode

 Built-in 10/100Mbits/s PHY, support EEE function

 Support configurable destination MAC address filtering table, which can selectively filter and receive incoming frames from the network port

 Supports the function of limiting the flow of CPU ports to protect the CPU from being attacked by large traffic

Video codec (HiVXE2.0 processing engine)

Hi3798M V310 integrates H265/H264/AVS+/MVC/VC-1/MPEG-2/MPEG-4/AVS/JPEG/PNG and other multi-protocol HD video and picture decoders, providing powerful video and picture encoding and decoding capabilities.

 H.265/HEVC Main/Main10 [email protected] High-tier; support 4Kx2K@60fps decoding

 AVS2 benchmark 10-bit grade @ level 8.2.60, maximum support 4K*2K@60fps 10bit decoding

 H.264/AVC BP/MP/HP@ level 5.1; H264/AVC MVC, support 4Kx2K@30fps decoding

 MPEG-1 supports up to 1080p@60fps decoding

 MPEG-2 SP@ML, MP@HL, maximum support 1080p@60fps decoding

 MPEG-4 SP@L0-3, ASP@L0-5, support GMC, support short header format, maximum support 1080p@60fps decoding

 AVS benchmark profile@level 6.0, AVS-P16 (AVS+), maximum support 1080p@60fps decoding

 Support full HD JPEG Baseline decoding, up to 64 million pixels

 Support MJPEG Baseline decoding, up to 1080@40fps decoding

 Support PNG decoding, up to 64 million pixels

 Support H.265/HEVC MP@level 5 Main Tier and H.264 BP/MP/HP@level 4.1 video encoding, maximum 1 channel 1080p@30fps

 Video encoding provides VBR and CBR modes

Graphics and display processing (Imprex2.0 processing engine)

Hi3798M V310 integrates a dedicated 2D graphics processing acceleration engine, a dedicated multi-layer graphics/video overlay engine (Hardware Composer Engine), and a dedicated display processing engine.

 Supports hardware overlay function of multiple graphics and video inputs

 Support 2-layer OSD, support 2 video layers

 Maximum support 4K*2K resolution image output

 Support mosaic and multi-region display

 Support Mirror function

 Support 16/32 bit color depth

 Support graphics and video rotation

 Support Letter Box and PanScan

    Support 3D video processing and display

 Supports multi-level vertical and horizontal scaling of video and graphics, and supports stepless scaling

 Support low-latency display technology

 Support full hardware enhanced 2D graphics acceleration engine

 Support full hardware anti-aliasing and anti-flickering

 Supports color space conversion with configurable coefficients (including BT2020)

 Support image enhancement, denoising and other functions

 Support De-interlace processing function

 Support sharpening

 Support brightness, chroma, contrast, saturation adjustment

 Support graphics and video DB/DR processing

 Support HDR

Audio and video interface

Hi3798M V310 integrates various types of audio and video input and output interfaces, providing rich audio and video input and output capabilities.

Video output interface

 Support 1 channel HDMI 2.0a TX output, support HDCP2.2/1.4, maximum resolution support 4K*2K; built-in DAC, support 1 channel CVBS output

     Support Rovi and VBI video output function

Audio input and output interface

 Support SPDIF audio output interface

 Built-in 1 channel audio DAC, supports left and right channels (RCA type, low impedance, unbalanced output interface)

 Support 1 channel I2S/PCM digital audio input/output

 Support 1 channel HDMI TX audio output

Peripheral interface

Hi3798M V310 integrates rich peripheral interfaces for various peripheral connections or system function expansion.

Infrared interface

Hi3798M V310 integrates a dedicated infrared remote control receiving unit IR (Infrared Remoter) to receive infrared data through the infrared interface.

 Flexible configuration to adapt to decoding of various data formats

 Support receive data error detection

 Support infrared remote control wake-up

 Provides 1 input interface

LED/KeyPAD Controller

Hi3798M V310 integrates LED/KeyPAD controller to realize LED display control and key scanning control.

USB controller

Hi3798M V310 integrates 3 USB2.0 controllers.

 Support HOST function, support android ADB debugging (USB0)

 Support low-speed and high-speed modes; support external expansion of Hub

GPIO

Hi3798M V310 integrates multiple groups of GPIO controllers, each group of GPIO provides 8 programmable input and output pins.

 Each pin can be configured as input or output

 When used as an input pin, GPIO can be used as an interrupt source

 When used as an output pin, each GPIO can be independently cleared or set to 1

UART

Hi3798M V310 integrates 3 UARTs (Universal Asynchronous Receiver Transmitter) for debugging, controlling, expanding Bluetooth, keyboard and other external devices. One of them is a 2-wire interface, and the other two are a 4-wire interface.

I2C controller

The Hi3798M V310 chip integrates 3 I2C (The Inter-Integrated Circuit) controllers to realize the standard I2C master function, and can complete the data transmission and reception to the slave devices on the I2C bus.

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