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MT6167 RF System Datasheet

1.1 Overview

The MT 6167 is an RF transceiver for high-speed 3G smartphones and tablets, implemented in 40 nm CMOS. The RF transceiver functionality is fully integrated. This document describes performance metrics for embedding rf macros throughout the product.

1.2 Key features

Full multimode RF solution (gge/wcdma)
direct conversion (3G), two-point modulation (TPM) and small signal polarity (TPM)
hybrid direct conversion (3G ) via 3 gpp version 8 (Hspa) GMSK and 8-PSK )/Low Intermediate Frequency (GGE, DC-HSDPA) receiver
Low supply current with DC-DC converter direct operation
26 MHz internal DCXO or external VCTCXO operation (with integrated AFC DAC)
RF calibration function supporting key Rx and TX specifications ( Image Rejection, LO Feed Pass Through, DC Offset)
Thermometry Subsystem

2 Block Diagram and Application Diagram

3 General Specifications
3.1 Packaging

At present, the product considers using the line key tfbga.

4 Supply Specification
4.1 External Power Supplies & Interfaces

The RFSYS macro consists of four power supplies.

5 Global Biasing
5.1 Biasing Overview

RFSYS has a global bandgap reference that is used to generate various different current references, which are then distributed to different subsystems.

Four types of bias are provided.

1. VBG/RI : temperature compensated current referred to an on-chip poly-p+ resistor (RI)
2. VPTAT/RI : PTAT current referred to an on-chip poly-p+ resistor (RI)
3. VBG/RT : temperature compensated current calibrated to an external resistor (RT) 
4. VPTAT/RT : PTAT current calibrated to an external resistor (RT)

6 LDO’s and Level Shift Biasing

Each power subdomain of RFSYS is regulated by a low loss regulator for proper power regulation. These are customized for each requirement such as noise, reverse isolation (high fre). (leakage), DC accuracy, DC load requirements, PSSR, etc. The overall power plan is shown in Figure 5

7 Reference Clock Specification

The MT6167 RF system integrates a core 26 MHz Xtal oscillator (DCXO), AFCDAC and a 32 kHz low power mode. In addition, the system also integrates external and internal clock buffers.

The operating mode (internal DCXO or external VCTCXO) is selected by inputting XMODE from the baseband and has the following functions

In crystal mode, Xtal is directly connected between XO1 and XO2.

In VCTCXO mode, the XO2 pin is reconfigured as the AFCDAC output and XO1 is configured as the VCTCXO clock input pin.

Since the state of xmode is locked in the module, a pin state "capture" scheme on the power supply can be used for baseband configuration if desired.

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